Microchip Masters 2024. Berlin

· Redakcija

PcEkspert was invited to this year’s Microchip Masters 2024. conference held in Berlin from September 16 to 18. Hosted at HTW Berlin, University of Applied Sciences at their Wilhelminenhof Campus, located in one of the most important industrial quarters of Berlin.

This district was one of Berlin’s first industrial centers, the site of the former cable factory of the Kabelwerk Oberspree. There, the workers manufactured cables, assembled cars and designedm transmitters. They were decisive in giving the city its reputation as an electric city.

The conference had numerous interesting lectures, ranging from Microchip product presentations to the hands on classes. We only had chance to visit some since there were overlaps, but we bring some of the interesting takeouts from the ones we attended.

Developing Your First Managed Ethernet Switch: A Hands-on Introduction to Linux Switchdev and an Overview of Switch Operating Systems was a very interesting presentation held by Mr. Richard Yarnall, discussing about developing a managed Ethernet switch can be achieved either by bare metal programming, using Linux Switchdev or a commercial off-the-shelf operating system. Switchdev is a suite of Linux tools that allows offloading the task of data forwarding from the host CPU to the switch ASIC itself. This class will introduce the concepts of adding IP addresses to devices, bridging and an introduction to VLANs and implementing them with Switchdev. This part of the class will be hands-on using the LAN9662 evaluation tools. The class will also demonstrate the implementation of the PTP4L Precision Time Protocol stack on the LAN9662 and introduce bringing up a device as an IEEE1588 synchronized device and demonstrate timing accuracy between networked devices. Additional freely available software libraries will also be introduced to further expand the use of Switchdev, time and Linux to build the feature set of a switch. Finally, the class will give an overview of a switch operating system (IStaX) and a pragmatic overview of where each of the solutions may offer the most technically and commercially viable solution based on the requirements of the switch design.

Here are some of the key takeaways:

  • PCI-e 2.0 OCuLink Interface can control the switching fabric with the external CPU
  • MESA, MERA and P-NET API
  • PTP sync time between different nodes on an Ethernet network
  • SyncE(thernet) is a physical layer based, p2p, independent of network loading
  • gPTP (automotive/AV applications), G8265.1 and G8275.1 Frequency and Time./Phase profiles for telcos
  • Example: distributed 3 phase current measurements; scheduling time slots for specific data priorities. In a power grid system we will want to sample current and voltage simultaneously at multiple locations. Wire propagation delay approx 1ns/6 inch; SF to NY = 2900 miles. If we distribute time we can sample power at each location within ns despite transit delay.
  • Ptp4l is an open source ptp stack for Linux and is widely used

Next, Microchip Is… Analog, Power, Silicon Carbide, Discrete, Timing and Power over Ethernet Products, Security, Wireless, Wired and Touch Products presentation provided an overview of Microchip’s latest Analog, Power, Silicon Carbide, Discrete, Timing and Power over Ethernet products. It then gets into Microchip’s latest security, touch and connectivity products, both wireless and wired. Attendees will receive a broad understanding of our latest products across multiple technology domains and a high-level insight into potential integration opportunities and applications in their projects. Some of the keynotes were:

  • Analog portfolio
  • Microchip treelink
  • Networking portfolio
  • Wireless – Matter (universal standard), Thread, Zigbee, Ultrawideband, BT low energy and classic WiFi
  • Single pair Ethernet
  • Smarthub is an USB hub that integrates system-level functions typically associated with a separate MCU or processor
  • META-DX PHY Family high bandwidth/high capacity

 

Finally, we went to a workshop Unlocking the Power of the SAM M0+, M23, and M4 Arm®-based Microcontroller Architecture and Peripherals which offered a quick-start guide to coding for Microchip Arm Cortex® 32-bit microcontrollers, including M0+, M23, and M4 microcontrollers. It is designed to expedite the development process of embedded Arm-based projects, even for those unfamiliar with Arm-based devices. The course covered a wide range of topics, including SAM system architecture, communication buses, clock synchronization, compiler register access, port and pin control, and interrupts. Practical application is provided through hands-on labs using the MPLAB® Code Configurator (MCC) and MPLAB Harmony, ATSAME54 M4 microcontroller, and MPLAB X Integrated Development Environment (IDE). Attendees should have some experience with C programming for embedded microcontrollers.

Some of very useful takeaways were:

  • On 32 bit clock distribution is complicated for project startup
  • Covering Cortex communication buses and clock system with register access
  • Advanced HighPerformance Bus and Advanced Peripheral Bus
  • Bus master on AHB – DMA, Device Service Unit (debug mechanism), cache controller, integrity check monitor and CPU in general (Mx cores)
  • Advanced Peripheral Bus (APB) – low power, no pipeline transfer, slave to AHB bus, low complexity data transfer
  • Clock structure – on MCU die, clock is spread everywhere
  • Driver coding Harmony system
  • MPLAB XC32 compiler header file structure
  • xc.h include is important
  • Addresses starting with 4 are peripherals

 

This was by far most interesting hands on course we went to, having Microchip’s finest experts explaining multiple details about bootstraping a project on 32 bit MCU.

We would like to thank Microchip for this opportunity and are looking forward to new ones!

DRUGE NOVOSTI